Search results for "Time-dependent gate oxide breakdown"
showing 3 items of 3 documents
Origin of the substrate current after soft-breakdown in thin oxide n-MOSFETs
1999
In this paper is presented an experimental investigation on the origin of the substrate current after soft-breakdown in n-MOSFETs with 4.5 nm-thick oxide. At lower voltages this current shows a plateau that can be explained with the generation of hole-electron pairs in the space charge region and at the Si-SiO2 interface, and to carrier diffusion between the channel and the substrate. At higher voltages the substrate current steeply increases with voltage, due to trap-assisted tunneling from the substrate valence band to the gate conduction band, which becomes possible for gate voltages higher than the threshold voltage. Measurements on several devices at dark and in the presence of light, …
Reduction of thermal damage in ultrathin gate oxides after intrinsic dielectric breakdown
2001
We have compared the thermal damage in ultrathin gate SiO2 layers of 5.6 and 3 nm thickness after intrinsic dielectric breakdown due to constant voltage Fowler-Nordheim stress. The power dissipated through the metal-oxide-semiconductor capacitor during the breakdown transient, measured with high time resolution, strongly decreases with oxide thickness. This is reflected in a noticeable reduction of the thermal damage found in the structure after breakdown. The effect can be explained as the consequence of the lower amount of defects present in the oxide at the breakdown instant and of the occurrence of a softer breakdown in the initial spot. The present data allow us to estimate the power t…
Characterization of soft breakdown in thin oxide NMOSFETs based on the analysis of the substrate current
2001
We have investigated the properties of soft breakdown (SBO) in thin oxide (4.5 nm) nMOSFETs with measurements of the gate and substrate leakage currents using the carrier separation technique. We have observed that, at lower gate voltages, the level of the substrate current exhibits a plateau. We propose that the observed plateau is due to the Shockley-Hall-Read (SHR) generation of hole-electron pairs in the space charge region and at the Si-SiO/sub 2/ interface. At higher voltages, the substrate current steeply increases with voltage, due to a tunneling mechanism, trap-assisted or due to a localized effective thinning of the oxide, from the substrate valence band to the gate conduction ban…